Amid a sea of red ink, Advanced Micro Devices (AMD) has developed microprocessors with a speed advantage and a market lead over rival Intel. The AMD Athlon processor, code-named K7 and based on a 0.25-micron line-width process, has since June 23rd shipped to computer manufacturers in speeds of 500MHz, 550MHz, and 600MHz. Consumers should start to see systems with this technology in the third quarter 1999. With the K7, AMD hopes to substantially outperform and under-price Intel. The power of these new chips suggests another round of processor price cuts and the possibility that AMD will compete effectively in the desktop computer marketplace and the server marketplace as well. AMD chips, the Tonya Harding to Intel’s Nancy Kerrigan, face the burden of competing directly with Intel’s chips, while remaining compatible with Intel’s standards. AMD’s consistent affordability has profoundly affected the entire processor market. AMD’s K6 drove Pentium-chip prices down across the board. When AMD began capturing the low-end processor market, it forced Intel to rush out its Celeron chip, possibly the greatest boon to budget PC computing this side of 1995. The last time AMD managed to trump Intel--when AMD released the K6-450, which clearly outperformed the Pentium-II-450 and occasionally the Pentium-II-500--Intel reached quickly into its magic bag and unleashed the fury of its Pentium-III-500. What is the K7’s secret? While recent Intel offerings--the Pentium II, Xeon, Celeron, and Pentium III--are based on the old Pentium Pro architecture, the K7 is a complete ground-up redesign. In the back end, the K7 features a fully pipelined Floating-Point Functional Unit (FPU), three fully pipelined Integer Execution Units (IEUs), and three fully pipelined Address Generation Units (AGUs). With fully pipelined FPUs, each sub-unit can function independently. In older chips, certain sub-units of the FPU shared resources, which meant that the FPU could not perform multiplications while performing additions. It’s as if Henry Ford walked onto his assembly line and found just one toolbox for three construction crews, leaving two crews idle while one crew worked on one car. The folks at AMD have provided a toolbox for each crew. Thus, while older generation chips can issue only one floating point operation per FPU per cycle, the K7 scheduler can issue three floating point operations; the same holds true for the IEUs and the AGUs. Add to this K7’s EV6 200MHz bus, with its much-touted point-to-point technology. Not only is the K7’s bus faster than Intel’s, AMD has designed it for greater independence between CPUs. Intel’s GTL+ bus technology has a shared-bus topology, which means, for example, that if an Intel motherboard has four chips, all four chips share one line to one bus, so only one chip can reach for one resource at a time. In the EV6 bus, each chip has its own line to the chipset. Hard-core technology enthusiasts have welcomed the K7 chip enthusiastically, but we’ll have to wait and see how it fares when AMD releases it in greater quantities and to a general audience. If K7 succeeds, it may greatly help the flagging AMD, which has taken a real beating from Intel’s rapid deployment of the Celeron. Perhaps more important, the K7’s success may continue AMD’s grand tradition of goading Intel into producing greater speed for lower prices. For an excellent primer on K7’s technologies, check out John Stokes’s article at http://www.arstechnica.com/cpu/3q99/k7_theory/k7-one-1.html.